Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
In multi-core processor architectures, multiple processor cores may be included in a single integrated circuit die or on multiple integrated circuit dies that are arranged in a single package. A cache may be used to store data for access by one or more of the processor cores. The data can be a subset of data stored in a typically larger memory that is typically located outside of the die and/or a subset of data stored in another cache of any size that is on-chip or off-chip. Each processor core may be provided with a cache that stores data for the processor. Each processor core may be configured to access data from a respective cache using a cache access pattern. An operating system configured to be in communication with the multi-core processor may determine a cache access pattern for each processor core.